FPGA工程师
FPGA Engineer
[English]
Key Qualifications
1. Minimum 2 years working experience
2. Master of Verilog programming language
3. Familiar with DDR3/4、 USB3、MIPI、UFS、PCIE or HDMI
4. Serdes experience will be better
Education & Experience
Master degree preferred or at least 2 years working experience
Specific Duties
1. Develop high speed communication protocol
2. FPGA Verification
3. System integration and test
Location: Qingdao, Wuxi
Send Resume to: robei@robei.com
要求:
1. 研究生及以上学历,2年以上工作经验,不限专业,特别优秀的本科生亦可
2. 熟悉Verilog语言
3. 熟悉DDR3/4、 USB3、MIPI、UFS、PCIE或HDMI的协议优先
4. 有Serdes通信经验的优先
工作内容:
1. 开发高速通信协议
2. 整合FPGA验证
3. 系统测试与调试
待遇:面议
工作地点:青岛,无锡
简历发送到:robei@robei.com